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Silicon Labs /Series1 /EFM32GG11B /EFM32GG11B120F2048GM64 /MSC /STATUS

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Interpret as STATUS

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https://regviz.com/r/Silicon Labs/Series1/EFM32GG11B/EFM32GG11B120F2048GM64/MSC/STATUS#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BUSY)BUSY 0 (LOCKED)LOCKED 0 (INVADDR)INVADDR 0 (WDATAREADY)WDATAREADY 0 (WORDTIMEOUT)WORDTIMEOUT 0 (ERASEABORTED)ERASEABORTED 0 (PCRUNNING)PCRUNNING 0 (BANKSWITCHED)BANKSWITCHED 0WDATAVALID 0PWRUPCKBDFAILCOUNT

Description

Status Register

Fields

BUSY

Erase/Write Busy
LOCKED

Access Locked
INVADDR

Invalid Write Address or Erase Page
WDATAREADY

WDATA Write Ready
WORDTIMEOUT

Flash Write Word Timeout
ERASEABORTED

The Current Flash Erase Operation Aborted
PCRUNNING

Performance Counters Running
BANKSWITCHED

BANK SWITCHING STATUS
WDATAVALID

Write Data Buffer Valid Flag
PWRUPCKBDFAILCOUNT

Flash Power Up Checkerboard Pattern Check Fail Count

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data